The present invention relates generally to the field of semiconductor devices, and more particularly to determining a reliability monitor test strategy for semiconductor packaging.
Integrated circuits on semiconductor devices are found in a wide variety of equipment, including household appliances, consumer electronics, communications systems, automotive systems, aircraft, and the like. As dependence on integrated circuits has increased, the reliability of the devices, and the reliability of the interconnection of a device to the substrate on which the device is packaged, has increasingly become an important concern. In general, as devices scale to smaller dimensions and more advanced silicon fabrication technologies, the devices often become less reliable for the same use conditions. Reliability is a design engineering discipline that applies scientific knowledge to assure a product will perform its intended function for the required duration within a given environment. This includes designing in the ability to maintain, test, and support the product throughout its total life cycle.
A semiconductor device interconnected to a substrate is often referred to as a semiconductor package or a module. Ongoing reliability monitoring of semiconductor packages can be recommended or required by industry standards and users. One industry standard that defines ongoing reliability monitoring is the JEDEC Solid State Technology Association (JEDEC). JEDEC is an independent semiconductor engineering trade organization and standardization body. JEDEC specifies a plurality of tests and criteria for evaluating semiconductor package reliability. Tests include deep thermal cycling (DTC), high temperature storage (HTS), highly accelerated stress test (HAST), and pressure cooker test (PCT). In addition, JEDEC specifies the monitoring of moisture sensitivity levels.